(a) Field of the Invention
The present invention relates to an apparatus and method for driving a plasma display panel (PDP).
(b) Description of the Related Art
In recent years, flat panel displays such as liquid crystal displays (LCD), field emission displays (FED), PDPs, and the like have been actively developed. The PDP is advantageous over other flat panel displays in regard to its high luminance, high luminous efficiency, and wide view angle, and accordingly, it is favorable for making a large-scale screen of more than 40 inches as a substitute for the conventional cathode ray tube (CRT).
The PDP is a flat panel display that uses plasma generated by gas discharge to display characters or images, and it includes, according to its size, more than several scores to millions of pixels arranged in a matrix pattern. Such a PDP is classified as a direct current (DC) type and an alternating current (AC) type according to its discharge cell structure and the waveform of the driving voltage applied thereto.
The DC PDP has electrodes exposed to a discharge space, allowing DC to flow through the discharge space while voltage is applied, and hence it requires resistors for limiting the current. Contrarily, the AC PDP has electrodes covered with a dielectric layer that naturally forms a capacitance component that limits the current and protects the electrodes from the impact of ions during a discharge. Thus the AC PDP is superior to the DC PDP in regard to long lifetime.
Typically, the driving method of an AC PDP is sequentially composed of a reset step, an addressing step, a sustain discharge step, and an erase step.
In the reset step, the state of each cell is initialized in order to readily perform an addressing operation on the cell. In the addressing step, wall charges are accumulated on selected “on”-state cells and other “on”-state cells (i.e., addressed cells) for selecting “off”-state cells on the panel. In the sustain discharge step, a sustain pulse is applied alternately to scan electrodes (hereinafter referred to as “Y electrodes”) and sustain electrodes (hereinafter referred to as “X electrodes”) to perform a discharge for displaying an image on addressed cells.
In the AC PDP, the Y and X electrodes for such a sustain discharge act as a capacitive load, and a capacitance exists for the Y and X electrodes (hereinafter referred to as “panel capacitor Cp”).
Now, a description will be given as to a driver circuit for a conventional AC type PDP and its driving method.
FIGS. 1 and 2 are illustrations showing a conventional driver circuit and its operating waveform.
The driver circuit generating a sustain pulse as suggested by Kishi et al. (Japanese Patent No. 3,201,603) comprises, as shown in FIG. 1, Y electrode driver 11, X electrode driver 12, Y electrode power supplier 13, and X electrode power supplier 14. X electrode driver 12 and X electrode power supplier 14 are the same in construction as Y electrode driver 11 and Y electrode power supplier 13, and will not be described in detail in the following description.
Y electrode power supplier 13 comprises capacitor C1, and three switches SW1, SW2, and SW3. Y electrode driver 11 comprises two switches SW4 and SW5. Switches SW1 and SW2 in the Y electrode power supplier 13 are coupled in series between power source V1 and ground terminal 0. Power source V1 supplies a voltage Vs/2, and the voltage Vs is sustain discharge voltage. One terminal of capacitor C1 is coupled to the contact of switches SW1 and SW2, and switch SW3 is coupled between the other terminal of capacitor C1 and ground terminal 0.
Switches SW4 and SW5 of Y electrode driver 11 are coupled in series to both terminals of capacitor C1 of Y electrode power supplier 13. The contact of switches SW4 and SW5 is coupled to panel capacitor Cp.
As shown in FIG. 2, when switches SW1, SW3, and SW4 are turned on, with switches SW2 and SW5 off, Y electrode voltage Vy is increased to Vs/2 and capacitor C1 is charged with the voltage Vs/2. Subsequently, when switches SW1, SW3, and SW4 are turned off and switches SW2 and SW5 are turned on, the Y electrode voltage Vy is decreased to −Vs/2 by the voltage Vs/2 charged in capacitor C1.
Through this driving operation, positive voltage +Vs/2 and negative voltage −Vs/2 can be alternately applied to the Y electrodes. Likewise, positive voltage +Vs/2 and negative voltage −Vs/2 can be alternately applied to the X electrodes. The voltages ±Vs/2 respectively applied to the X and Y electrodes have an inverted phase with respect to each other. By generating a sustain pulse swinging between −Vs/2 and +Vs/2, the potential difference between X and Y electrodes can be maintained at the sustain discharge voltage Vs.
Such a driver circuit can employ elements of a low withstand voltage, because the withstand voltage of each element in the circuit is Vs/2. However this driver circuit is applicable only to plasma display panels using a pulse swinging between −Vs/2 and +Vs/2.
In addition, the capacitor for storing the voltage used as a negative voltage in this circuit must have a large capacity, so that a considerable amount of an inrush current flows in an initial starting step due to the capacitor.